SSE

[joselyt07]

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guys,unsay streaming simd extension

[vladmire]

wiki says: http://en.wikipedia.org/wiki/Streaming_SIMD_Extensions

SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! (which had debuted a year earlier). The fully expanded abbreviation stands for "Streaming Single Instruction, Multiple Data Extensions".

SSE contains 70 new instructions.

It was originally known as KNI for Katmai New Instructions (Katmai was the code name for the first Pentium III core revision). During the Katmai project Intel was looking to distinguish it from their earlier product line, particularly their flagship Pentium II. AMD eventually added support for SSE instructions, starting with its Athlon XP processor.

Intel was generally disappointed with their first IA-32 SIMD effort, MMX. MMX had two main problems: it re-used existing floating point registers making the CPU unable to work on both floating point and SIMD data at the same time, and it only worked on integers.

SSE originally added eight new 128-bit registers known as XMM0 through XMM7. The x64 extensions from both Intel and AMD add a further eight registers XMM8 through XMM15. There is also a new 32-bit control / status register, MXCSR.



Each register packs together four 32-bit single-precision floating point numbers. Integer SIMD operations may still be performed with the eight 64-bit MMX registers.

Because these 128-bit registers are additional program states that the operating system must preserve across task switches, they are disabled by default until the operating system explicitly enables them. This means that the OS must know how to use the FXSAVE and FXRSTR instructions, which is the extended pair of instructions which can save all x87 and SSE register states all at once. This support was quickly added to all major IA-32 operating systems.

Because SSE adds floating point support, it sees much more use than MMX. The addition of SSE2's integer support makes SSE even more flexible. While MMX is redundant, operations can be operated in parallel with SSE operations offering further performance increases in some situations.

The first CPU to support SSE, the Pentium III, shared execution resources between SSE and the FPU. While a compiled application can interleave FPU and SSE instructions side-by-side, the Pentium III will not issue a FPU and a SSE instruction in the same clock-cycle. This limitation reduces the effectiveness of pipelining, but the separate XMM registers do allow SIMD and scalar floating point operations to be mixed without the performance hit from explicit MMX/floating point mode switching.

[butitoy]

veri gud info!

UP BRO

[joselyt07]

kanang mga software-base methods?unsa mn n xa?

[vladmire]

kanang mga software-base methods?unsa mn n xa?

can you elaborate your question sir? cant really relate to it...

[joselyt07]

ok,i made a research on the benefits of a quad core processor and one of its features is that it improves the performance on many virtualized applications by allowing virtual machines to directly manage memory rather than relying on slower "software-based method"..

[COMCAM]

very deep info, not for me. up for this

[spookey]

ok,i made a research on the benefits of a quad core processor and one of its features is that it improves the performance on many virtualized applications by allowing virtual machines to directly manage memory rather than relying on slower "software-based method"..

by the way, multi-cores CPUs are useless to applications that are single threaded like most applications out in the market right now. maybe soon we will be able to see the performance boost on applications that are multi-threaded. for now, to name one, photoshop cs2 is a multi-threaded application so you will really feel the performance boost using a multi-core CPU. but if your going to use on it DOTA, MS Office Applications, starcraft, CS and other single threaded applications then only one core will be used since threading is not solely hardware based.